Tutorial #24
George Riley
November 2002

INTRODUCTION

In the two years since I posted Tutorial 3, “Gold Stud Bump Flip Chip,” a rapidly-widening range of new commercial applications has appeared for this well-established flip chip technology. These applications often exploit the unique benefits of gold stud bump flip chips, and their advantages in many cases over the more common solder bump flip chips. A key stimulus for this growth in gold stud bump flip chip applications has been the introduction a new generation of higher-speed, closer-pitch, dedicated stud bump bonders that allow high-volume production with reduced costs.

This tutorial supplements Tutorial 3 by focusing on applications and on the new equipment capabilities. It does not repeat the basics of Tutorial 3, which explain the what, why, and how of gold stud bump flip chip. Instead, it updates and builds upon Tutorial 3, to explain the growing reach of stud bump flip chip for high-density packaging.

As detailed in Tutorial 3, gold stud bump flip chip forms connections from die pads to a board or substrate by means of gold bumps placed on each bond pad in a process similar to gold wire bonding.

Figure 1 shows a 75 micron diameter gold stud bump on a bond pad. Gold stud bumps require no under-bump metallization (UBM) or special wafer treatment before bumping. They offer finer spacing than most solder bumps, without the added expense of a solder-bump redistribution layer, and with flux-free, low temperature assembly. Bumps may be placed on wafers, or on the active surface of individual die that have surface-sensitive features, such as MEMS, sensors, biomedical, and high-frequency die. These and other advantages are key to the growth in stud bump applications, products, and volume production.

EQUIPMENT

First-generation equipment for gold stud bumping was generally based upon on conventional gold-ball wire bonders, with software modifications for bumping. The first dedicated machines developed as stud bump bonders were relatively slow, and could not offer single-pass bumping for larger wafer sizes. Now, new-generation equipment introduced in the past year can bump and coin full 300 mm wafers, with the higher speeds and the closer bumping pitches required for volume production of high-density stud bumped wafers.

The present speed leader in stud bump bonding appears to be the K&S WaferPROplus , a dedicated wafer-bumping machine. The WaferPROplus places up to 16 bumps per second, with a production pitch (center-to-center spacing) as close as 60 microns. For applications that require very close control of bump height coplanarity, the AccuBump option accurately shears the bump tail as the bump is formed. This allows one-pass bumping with +/- 2.5 micron planarity over a 300mm wafer, at rates up to 12 bumps per second. AccuBump eliminates the need for a separate coining tool and process step. Figure 2 shows a sheared AccuBump.

High-frequency 120 KHz ultrasonic transducers allow die and wafers to be bumped at lower temperatures. The K&S WaferPROplus offers programmable dual-chuck thermal ramping, to reduce thermal stresses when bumping temperature sensitive materials such as Lithium Niobate, Lithium Tantalate, Gallium Arsenide, and Indium Phosphide.

The result of these equipment improvements has been faster, lower-cost, higher-density bumping, with maximum flexibility to serve a wide range of applications. The following paragraphs describe some applications for which gold stud bumping has become the technology of choice.

APPLICATIONS

SAW Filters

A mainstream high volume application of gold stud bump flip chip is for surface acoustic wave (SAW) filters, used in cell phones and other RF applications. SAW filter assembly benefits from the form factor advantages of flip chip to yield smaller, thinner, and lighter units than older packaging approaches. However, proper functioning of SAW filters requires that the surface of the active element remains free from physical contact with extraneous materials. The assembly process must include neither underfill nor encapsulants, and leave no flux nor other residues on the die. These limitations make solder bump flip chip unattractive. Gold stud bumps have become the high-volume standard in this application. The low number of contacts allows fast, one-step gold thermosonic assembly, without underfill and without compromising filter performance.

Hearing Aids

Hearing aids are another form-factor driven application for gold stud bump flip chip assembly. Here, both size and weight must be minimized. Hearing aids are well suited for gold stud bump flip chip with conductive adhesive assembly. Dipped conductive adhesive assembly, described in Tutorial 3, may be made with single or double stud bumps.

Figure 3  shows a dipped, coined single bump. “Doubling” the stud bumps increases the under-chip gap by placing a second stud bump immediately on top of the first one. The added bump height aids in stress relief, and allows relaxing the adhesive thickness tolerances of the dipping step, so that high-speed flip dipping equipment does not risk adhesive touching the surface of the die. Figure 4  shows triple-stacked stud bumps.

RFID Tags

Low-cost radio-frequency identification (RFID) tags are potentially an “intelligent replacement” for bar codes. The stringent cost goals and low I/O count in these applications has led manufacturers to gold stud bumping millions of units. Assembly may be with anisotropic conductive film (ACF) or anisotropic conductive paste (ACP), or by dipping in isotropic conductive adhesives. As with hearing aids, double stud bumps may be used to insure die surface clearance for high-speed conductive adhesive dipping.

Singulated Die Bumping

Some developing applications, in optronics, MEMS, biomedical, sensors, and other leading-edge fields, are constrained to processing and bumping single die, rather than wafers. Common reasons are that the wafer has raised surface features, or requires special surface post-processing which must be completed before bumping, but which is also incompatible with most subsequent wafer bumping techniques. Gold stud bumping is in that case a practical die-based bumping approach, since it not only requires no UBM, but also permits easy bumping of individual singulated die instead of wafers. As long as the die bond pads are of a wire-bondable material, individual die can be stud bumped.

Subsequent assembly may be thermosonic, thermocompression, or with adhesives. These surface-sensitive bumping applications generally, like SAW filters, are also intolerant of flux and underfill. Compliant gold stud bumps with thermosonic assembly are often the solution.Figure 5 shows a thermosonic-mounted gold stud bump MEMS assembly, viewed through a glass substrate.

Singulated die stud bumping bumping is also well suited to product development and prototyping. In prototyping, single die bumping takes full advantage of shared wafer development, where the variety of die and applications served by a single wafer might preclude wafer bumping. It also allows rapid development using off-the-shelf die without the cost and delays of wafer processing.

Another application of single die stud bumping is for thermocompression bonding of III/V semicondutors, such as GaAs and InP. These often do not mix well with wafer-bumping processes. Here, the gold metallization of the die bond pads may allow “reverse bumping,” placing the bumps on the substrate, instead of on the die. This avoids the horrors of fixturing very small individual die for bumping.

Biomedical Devices

Advanced biomedical devices such as DNA analyzers, which operate in wet-chemical environments, are another successful application of gold stud bump interconnection. In this case, the gold stud bumps are placed directly onto platinum bond pads. The platinum, required for other electrodes in the assembly, bonds well with gold bumps on the contact pads. No UBM or special metallization is required. Assembly may be made with thermosonic, thermocompressive, or adhesive interconnection.

ACF Chip-On-Board

Gold stud bumps combined with anisotropic conductive film (seeTutorial 5, “ACF Flip Chip”) are finding many applications in high density chip-on-board (COB) IC assembly. The assembly technology is based upon upon the years of continuing ACF experience in high-volume production of Chip-on-Glass (COG) and Chip-on-Flex (COF) interconnections. For ACF COB assembly, gold stud bumps are coined to heights in the 35 to 40 micron range, within typically 3 microns of coplanarity. The greater height and malleability of the stud bump, compared to plated gold bumps, better accommodate the board height variations and CTE differentials encountered in COB, but not common in COG or COF.

Detector Arrays

Pixel detector arrays use gold stud bumps for direct connection of each of several hundred sensor elements to its own channel of first-stage signal processing. These arrays, used in high-energy x-ray and particle detectors for astrophysics, accelerators, x-ray machines, and similar applications, keep energy-absorbing lead solder bumps out of the detector by gold stud bumping and adhesive interconnection. Figure 6 shows a portion of a stud-bumped pixel detector array.

The low temperature processing capability of the stud bump/adhesive system is suitable for assembling temperature sensitive detectors such as Cadmium-Zinc Sulfide, and for oriented thin film pyroelectric detectors. Tutorial 10, “Flip Chip Interconnection for Detector Arrays” gives details and photos of detector arrays in applications from astrophysics to protein crystallography.

3-D Packaging

Various three-dimensional die assemblies have been produced with stud-bumped die. In one approach, several stud-bumped die are assembled onto a strip of flexible circuit. When the strip is folded over upon itself (the “calzone” technique), the resulting 3-D stack of die makes a board footprint smaller than that of a single packaged die. Figure 7 shows a folded stack of 4 die, and a packaged single 64-Meg RAM.

A simpler and more common 3-D application of stud bumped die is for die-on-die stacking. Here, the bottom die in a stacked assembly may be placed onto a board or substrate with gold stud bumps and thermosonic assembly. The second die, mounted face-up on the back of the first die, is wire bonded to peripheral pads. There is no electrical connection within the stack; one die simply rides piggy-back upon the other.

New Directions

Equipment manufacturers are keeping up with application requirements for bumping ultra-thin die and wafers. Problems in thin-wafer warping and in wafer handling have been solved. Automatic handlers now permit high-speed gold stud bumping of wafers less than 100 microns thick.

Recent improvements in the precision placement of ACF film potentially offer a new, controlled-underfill solution to underfill-intolerant devices such as MEMS and SAW filters. Precision placement allows the ACF film to cover the bond pad area without impinging upon the sensitive central die surface. Since ACF contains its own underfill, the cured ACF adds additional strength to gold stud bumps around the periphery of the device. The adhesive fillet forms a perimeter seal around the device for added environmental protection.

The next major process development in stud bump assembly may be copper stud bumping. There are two potential rewards. Copper bumps placed on the usual aluminum bond pads would provide directly solderable connections for tin-lead solders. Gold stud bumps dissolve in tin-lead solder and form high-gold, low-reliability bumps. Copper stud bumps on aluminum pads may not require a UBM, and thus could make individual standard IC die solderable.

The growing interest in copper on-chip metallization for high performance IC’s offers the second potential reward: an all-copper single-metal assembly system, with copper stud bumps placed on copper die bond pads. K&S is said to have an active development program for copper stud bumping, both onto copper and aluminum.

CONCLUSION

Advances in stud bump equipment and technology will continue to broaden the range of applications that require the size, cost, and simplicity benefits of stud bump flip chip assembly.

FOR MORE INFORMATION

Tutorial 3, “Gold Stud Bump Flip Chip”

Tutorial 5, “Anisotropic Conductive Film (ACF) Flip Chip”

Tutorial 9, “Thermosonic Flip Chip Assembly”

Tutorial 10, “Flip Chip Assembly of Detector Arrays”

Technology Update, “Stud Bump Flip Chip Assembly of MEMS Motion Sensors”