George A. Riley
Why bump single die?
Bumping single die, rather than bumping entire wafers, is the preferred approach for flip chip assembly in several circumstances. For product development, prototyping, design validation, and test development, bumping and assembly of small quantities of die is faster and more economical than working with entire wafers. For low to medium volume production with standard commercial chips, off-the-shelf die can be directly bumped without requiring under-bump metallization (UMB) or special treatment. For bumping and assembling post-processed devices not suitable to wafer bumping, single-die bumping may be the only feasible method. Post-processed devices include some MEMS with raised surface features, as well as chip-capped hermetic cavity devices that are sealed at the die level.
Gold stud bumping single die
Gold stud bumping of entire wafers with high-speed bumping equipment is a well-established process that serves a growing market segment for lead-free high-performance gold-to-gold connections.  Gold stud bumping is adaptable to single-die bumping with the addition of vacuum and mechanical fixturing to securely hold the die during bumping.
Gold stud bumps are formed directly on the device bond pads, by modified versions of gold-ball wire bonders. Like wire bonds, gold stud bumps may be formed on standard aluminum bond pads, without any special pre-treatment or UBM. Bumped die connection to a board or substrate may be by thermocompression or thermosonic bonding, or with adhesives.   
Limitations of stud bumping
Gold stud bumping has several limitations for single die bumping. Unlike the more common solder bumps, die with gold stud bumps will not self-align during assembly. Stud bumped die require more precise chip to substrate and placement alignment than solder bumped die. These alignment and bonding steps require higher precision assembly equipment than for solder bump assembly. Variations in bump height and shape can also be process limitations.
Thermosonic stud bump assembly is limited to relatively low bump counts, typically 20 to 40 bumps, depending on the equipment. Thermocompressive assembly permits higher bump counts, but at a penalty in higher temperature and pressure during assembly. Either process may damage some new low-K materials.
Adhesive interconnection permits very high bump counts, but the geometry or the final application may not be suitable for adhesives. Adhesive assembly also requires special dispensing or printing equipment and a special curing cycle.
More important than these equipment or bump-count limitations, most production flip chip is solder bumped, rather than gold stud bumped. Prototypes or developmental devices with gold stud bumps will differ from production devices with solder bumps. Differences may include bump heights, repeatability, conductivity, heat flow, and mechanical compliance. Underfill requirements and environmental stress performance will differ between stud bumps and solder bumps. The gold stud bump assembly process differs from solder bumped assembly. Performance and environmental testing of gold stud bump prototypes will not be fully representative of solder bumped final products.
Solder bumping single die
CVI recently announced a novel approach to solder bumping single chips.  CVI can create solder bumps on the bond pads of singulated die or of partial wafers. Turnaround times can be less than one week, allowing faster design validation and better test simulation prior to final design. The CVI solder bumping process accommodates a variety of solder compositions, including eutectic tin-lead, high-lead, indium-lead, gold-tin, and lead-free SAC. Figure 1 shows a solder bumped single die from CVI. Technical details are proprietary pending patent filings.
Figure 1. Solder bumped single die.
Solder bumping singulated die has several advantages in prototyping, packaging, and test development, and significant advantages over gold stud bump for devices intended for solder bump assembly. Applying solder bumps to prototypes, instead of gold stud bumps, allows evaluating and testing with the final packaging material, rather than a with a non-representative substitute, which must later be replaced. Production equipment and the production process flow can be used for development, reducing investment and saving a re-validation step. Environmental stress test results of solder bumped prototypes will be representative of the final product.
Solder bumping retains the self-aligning advantage of solder over gold stud bumps, relieving placement tolerances and avoiding the need for expensive precision aligning equipment. Solder bumping is suitable for high bump count final products, avoiding the bump count limitations of stud bump thermosonic assembly and the high temperatures and pressure of stud bump thermocompression assembly. Bump to bump variability is reduced compared to bumping processes such as stud bumping, solder jetting, screen printing, and electroplating.
The CVI single-die approach also offers unprecedented flexibility for packaging evaluation. For example, alternate pads on the same die can be bumped with different alloys to compare lead-free solder formulations. Making comparisons on the same die eliminates die-to-die or lot-to-lot variations as potential sources of error. Different bump solder compositions within a single die offers unique opportunities for electromigration studies
Solder bumping single die is a quick and economical flip chip approach for product development and validation. Solder bumping single die prototypes offers special advantages for devices intended for solder bump assembly in production, and for post-processed devices unsuited to wafer bumping. Bumping a single die with different solders has unique advantages in comparative evaluations of solder compositions.
 George Riley, “Bump, Dip, Flip: Single Chip,” Proceedings 1997 Surface Mount International, September 1997, pp. 535-541.
 George Riley, “Stud Bump Flip Chip Assembly of MEMS Motion Sensors,” Proceedings IMAPS New England Symposium, May 8, 2001
 Tutorial 27. Shaping Gold Ball Bumps
 Tutorial 9. Thermosonic Flip Chip Assembly
 Tutorial 24. Gold Stud Bump Applications
 Tutorial 50. “Gold Stud Bump Update”
 Tutorial 33. Conductive Polymer Assembly of High Pin Count Flip Chip
 Robin Norvell, “CVI Offers Wafer Bumping One Die at a Time” Circuits Assembly, March 17, 2005.
For more information
Information about single die solder bumping was provided by CVInc, www.covinc.com
Contact Terence Collier for more information: Email email@example.com