The Early Days
In the early 1960′s, the semiconductor industry was trying out various schemes for connecting the new Integrated Circuits (IC) to printed circuit boards. Although there were many variations, the three basic approaches were wire bonding, chip carriers with beam leads and direct chip connections. Four decades later, we are still using the same three approaches, but with many more variations. Back then, the chip makers were the only packagers, and each company favored its own approach. While wire bonding worked, most companies didn’t like the slow manual bonders and the one-lead-at-a-time process.
Many companies attempted to make integrated leadframes with cantilevered beams that could all be simultaneously bonded to the IC. These “spider” circuits later evolved into Tape Automated Bonding (TAB), with the metal spider replaced by a flex circuit.
Figure 1 shows the early spider circuit. Today, flex-based chip carriers with cantilevered beam connections are popular in Tessera’s mCSP and IBM’s TBGA (Tape Ball Grid Array).
IBM was as strong an innovator in the 1960′s as they are today. While the rest of the electronics industry was wiring up chips, IBM took a more direct approach. They were certain that nothing could better a direct chip connection (DCA), but reduction to practice was “non-trivial”, a favorite IBM term. IBM explored several DCA methods. Soldering could work, but the results were inconsistent. Solder bridging could occur, and the space between the chip and substrate varied. If only the height could be controlled, DCA would be a great alternative to wired chips.
One early package, the SLT (Solid Logic Technology), solved that problem and several others. The interconnection was by a copper micro-ball, not by solder. The copper spheres were bonded to the pads of the solid state device (a transistor) using high-melting-temperature solder. Alpha Metals (now Alpha-Fry Technologies) manufactured these copper spheresuntil the 1980′s. The pre-cut copper segments were dropped in a fluidized bed of inert mineral powder and melted by an induction coil. As the segments passed though the hot mineral they melted and formed spheres. 
The result was the world’s first Ball Grid Array (BGA), the first DCA and apparently the first Surface Mount Technology (SMT) device. Since the package was chip size, the SLT was also the first CSP. While some may argue that flip chips are not real CSPs, this package did not use underfill and could probably be reworked since the copper balls were attached with high-melting alloy.
Ironically, a “new” innovation in CSP industry of the nineties is to use copper micro-spheres to achieve the same results obtained in 1961 . Note that the SLT package was developed so early that it was applied to transistors, not to ICs. The product went into production in 1964 in the IBM System 360. A sealant was used to exclude moisture from the bump interconnect, reducing the risk of electromigration. Silicone was the original sealant, but an amide-imide, ATP-10, was also used that had a high enough modulus to improve thermocycle performance. Thus, underfill is also an invention of the early 1960′s.
Second Generation Flip Chip
Second generation flip chip might be said to have begun with IBM’s introduction of their Controlled Collapse Chip Connection, or C4 (C4) process. This was their second flip chip technology and came the year after the SLT launch of 1964. However, flip chip technology development soon spilled over into the related areas of substrates and underfills.
Ceramic was initially IBM’s preferred substrate for direct chip attach. Alumina was the only readily available substrate material with the desired low coefficient of thermal expansion (CTE). A CTE mismatch between the silicon device and substrate would cause high stress on the bumps during the temperature cycling that might result from power on/off cycles.
However, the ceramic substrates were not perfect CTE matches. Alumina’s CTE ranges from 6.5 to 7 ppm per° C, while glass-ceramics can get down to about 3 ppm per° C, compared to silicon’s 2.3 ppm ° C. Also, alumina substrates are relatively expensive compared with low cost high CTE organic substrates. Alternative substrates became a major research area at IBM, and a few years later, at Delco.
The Underfill Saga
How could low cost organic substrates, like FR4, with relatively high CTE’s, be used for flip chip? The answer had been found years ago, in one of those rare serendipity events that we like to call a real invention. Retired IBMers tell this story, which is based on hearsay:
A variety of bump metals were being investigated, including indium solder alloys. These were especially intriguing since joints could be formed without reflow by just using pressure. However, the indium alloys would degrade quickly in the presence of moisture, especially under electrical bias. Although the IBM modules were sealed from the environment, the Research Department decided investigate moisture-resistant sealants to place directly around the bonded flip chips. It became apparent that low viscosity materials could flow under the tiny chips. Materials ranging from silicones to epoxies were tested.
The moisture testing unexpectedly revealed that some of the underfilled flip chips could withstand thermal cycling better than chips without underfill. Investigation of this underfilling effect led to the conclusion that properly formulated adhesives could extend lifetimes. These underfilled chips withstood thousands to tens of thousands of thermal cycles before failing because of the small CTE mismatch between chip and ceramic carrier.
While silicones had very little affect on joint fatigue, the amide-imide gave up to a three times thermal cycle improvement. But epoxies produced an astounding ten-fold improvement. Hitachi, in 1988, provided underfills to IBM that consistently improved thermal cycling and sealed out moisture . This “underfill effect”, although well understood, was not really needed for these small FCs on low expansion ceramic. However, the drive towards larger chips and organic substrates made underfill essential.
Epoxies were chosen as the preferred polymer for underfills because of availability, ease of formulation and safety. IBM had been using epoxies for solder masks and other PWB applications and was comfortable with them. In fact, when the group testing underfills asked for coloration to make inspection easier, one formulator borrowed from the circuit materials group. Wanting to avoid the tedious process of qualifying a new “chemical” for use within the company, the formulator asked for the green colorant that was then used for solder masks. Finding that a mixture of yellow and blue colorant was used, he chose blue – and this is why IBM underfills are blue.
Later, the IBM New York based laboratories and manufacturing facilities sought to outsource their underfill. IBM was already using materials from a small coatings formulator near by called Dexter-Hysol. This company began producing the underfill under contract for IBM. Viscosity was high, flow was slow and curing time was about six hours. However, even by today’s standards, these first underfills would be commercially viable.
In the late 1980′s and early 1990′s, Motorola, an IBM flip chip licensee, worked diligently to move second generation FC into production. If IBM was a “ceramic circuit” company, Motorola was a low-cost, high volume “polymer circuit” company. Motorola quickly realized that slow flow and long cure was not the best formula for productivity. Initially, Motorola sought shorter cure times.
In the early 1990′s, Alpha Metal’s polymer group, Advanced Products Division, decided to tackle the “underfill bottleneck” problem. Their first underfill product dropped the cure time down to 30 minutes, with much faster flow. The Universal Instruments Consortium tested this first fast flow/fast cure material. As fate would have it, the test chip, supplied by Texas Instruments, had a non-symmetrical layout with multiple rows around the perimeter, but no bumps in the middle.
The prevailing theory held that bumps slowed down underfill and fewer bumps were better. When the fast flow material was tested, a large void formed under the middle of the chip. The first hypothesis was that the new underfill was outgassing, but this was not the case. An innovative test was designed with the flip chip bumps coined flat and the chip clamped against a glass plate positioned over a video camera. Real time video disclosed what was really happening. The underfill was flowing quickly along the bumps and very slowly down the middle.
Figure 2 shows the flow problem.
The Great Underfill Race
Unfortunately, the immediate Consortium conclusion was that, “this is a weird underfill and you Alpha guys need to fix it!” The Jersey City based Alpha group, after checking into the basic principles of surface chemistry, decided that they were pursuing a correct strategy with fast flow. Underfills should have low viscosity, low surface tension and fast curing properties. In hindsight, this is a normal result of surface chemistry. Surface tension wetting or capillary action pulls along the underfill (hence the name – capillary underfills).
Being new and being first in unconventional underfills had become an uncomfortable combination. The Consortium gave the newcomers inadvertent bad press with, “Will you look at this weird underfill in the video”. Then came the StarTac crash. The new Motorola StarTac cellular phone, the lightest and most sophisticated phone of the early 1990′s was using a flip chip. But the classical underfill material, probably influenced by the old IBM formula, was causing die cracking.
A legion of engineers worked long hours to save the project and the product. The problem became so severe that Motorola resorted to manual wire bonding to get product out. The entire future of second-generation flip chip seemed to hinge on this high visibility product. How long could a company tout leading edge flip chip while quietly wire bonding? To make matters worse, marketing firm Prismark examined the new StarTac and surprisingly found that their reverse-engineered StarTac phone had NO FLIP CHIPS.
Motorola became desperate and let it be know that anyone who could solve the problem would get some quick business. The Alpha group had nothing to lose by taking a wild swing, since they had no customers. They already had met the desired characteristics of fast flow with fast cure and had passed thermocycling. Being an inexperienced underfill formulator was an advantage. But Motorola was allowing only a week and one shot for new entrants. The Alpha group applied well-know coating technology tricks and broke rules held sacred by the handful of underfill self-anointed gurus.
The modulus was lowered but the glass transition temperature dropped far below the accepted limit of 125oC. Conventional wisdom held that if the Tg was less than the maximum cycle temperature, the typically high CTE above Tg (called a2) would cause damage. The new materials were submitted offering a range of modulus values — and they all passed. Motorola quickly qualified the new Alpha underfill and the StarTac with FC was back on the market.
While there were few contestants, the underfill race was on. Unconventional Alpha, with tricks from the epoxy coatings industry, continued to lead by introducing a 15-minute cure and finally a 5-minute system in 1995. Abelstik (National Starch), with newly acquired Amicon, also had a 5-minute cure with good properties. A year or two later, others, including the market leader, had figured out the quick tricks. During the entire racing, flow was improved and by the late 1990′s, the most of the products had reached a plateau. However, events in a different field would change strategies for underfilling.
Let’s head back to Jersey City and the early 1990′s and look into the flux research lab. Flux R&D was aimed at coming up with a better no clean flux. A polymer chemist, acquired with one of the many Alpha/Cookson acquisitions, was convinced that epoxy resin and acidic hardener was a viable path. The idea was to form a neutral residue and just leave it in place. Work led to flux formulations with common epoxy resins and organic acid hardeners. Results were encouraging and a family of epoxy-based flux materials and pastes was launched. Now back to flip chip problems.
One of the irksome problems with flip chip underfills was lack of compatibility with most fluxes. One could clean flux residue but this was difficult with the cleaning equipment of that day. One idea that begged to be tested was the use of epoxy-based flux with epoxy-based underfill. And, of course, it worked. In fact, the two epoxy systems polymerized together during underfill cure. But there was another obvious idea begging to get out to lead a life of its own. Why not use one material for flux and underfill? And this is just what happened. Alpha Metals, Kester and others formulated flux-underfills and this class continues to show promise as “No Flow” underfill or NUF, although pre-applied flux-underfill liquid is more accurate.
Georgia Tech added the flux-underfill process to their flip chip program, and has done substantial work to quantify the process. So who really invented so called “no flow” underfills? Alpha Metals (now Alpha-Fry Technologies) holds some basic patents for epoxy-based flux. Kester probably introduced the first commercial products. And Georgia Tech elucidated the process and highlighted the concept. But the credit for the invention appears to belong to Motorola who received a patent on the combined flux/underfill adhesive concept. Although this 1990 (filing date) invention may not be optimum from a formulation viewpoint, the idea is there.
But there’s more to the underfill story. Back to Jersey City again, and yes, this is the last time. The StaystikTM gang was formulating, testing and selling die attach adhesives, but not the ordinary silver-epoxy. Their materials were based on thermoplastic resins that could be remelted and REWORKED. The Staystik products were sold as films and pastes in solution. The group wanted to get on the underfill bandwagon but a solvent-born material was totally impractical. Customers were just starting to ask for reworkable materials. Solvent evaporation would cause voids and significant shrinkage.
However, some customers were buying die attach paste, spin coating on wafers and drying. Others were stencil printing to get a higher yield. The result was a smooth, tightly bonded dry die attach film that could be bonded to a carrier by heat activation. Better yet, the coated wafer could be sawn. One more idea was struggling to get out. Why not substitute silica for silver filler and coat the front of the wafer? And here was the basic wafer-level underfill concept.
Research showed that the wafer-level concept was viable, but a lot of materials and process work would be required. Basic systems tested ranged from single-layer flux-underfills to double-layer configurations that kept flux and underfill separate. The flux layer development tapped into the experience of the epoxy-flux group. A change in resins provided a solvent-applied solid flux. The underfill layer was adapted material from the thermoplastic Staystik die attach family. Functionally, both underfills and die attach adhesives must strongly bond the chip to substrate and the mechanical properties can be remarkably similar.
After basic prototypes were developed and a large number of patents were filed and allowed, Alpha decided to wait and see, since it was not really clear that wafer-level underfill would be accepted by the industry and that there would be a return on the substantial investment. The consortium made up Motorola, National Semiconductor, Loctite and others, still continues to slowly develop a wafer-level underfill product and process, but will they run into the minefield of patents held by AFT and others?
But there is still one more piece to the underfill history. This time, we go to Alpharetta, GA where the former BP-Amoco Plaskon group developed molding compounds. The division was acquired by Alpha and moved a mile down the road to a major Alpha facility. One of the most intriguing projects was molded underfill (MUF). The group realized that high lead count Ball Grid Arrays (BGAs) would likely use flip chip and that many would be over-molded. Work with Hestia on molds lead to the development of tooling that could provide void-free underfilling. Epoxy Molding Compounds (EMC) were developed with the right fillers and melt profiles that gave good underfill performance. So with four classes of underfill vying for market space, let’s leave the races and now look at the history of bumping.
The conductive bump formed or placed on the IC bond pads fills several important electrical and functions:
First, it is very difficult to directly attach to thin aluminum or copper IC pads. Solder to aluminum is very difficult at best, but thin metals are “leached” or dissolved by solder. Unfortunately, the new copper IC’s don’t really solve the pad connect issue.
A second reason for bumps is to provide a standoff that can produce a controlled gap between the chip and the substrate. If the interconnect length was close to zero, any CTE mismatch would cause extreme stress concentrations. The bump acts as a short “lead” to relieve these stresses.
The third key function of the bump is to provide a good electrical connection, despite the insulating oxide layer on the aluminum bond pad. This is commonly accomplished by the under bump metallization (UBM) layer that is an essential part of the bumping system.
The UBM structure, commonly a layer of one or several metals over the IC pad, creates a barrier between the fragile IC pad and the bump. The final finish must either be solderable or be compatible with another joining material like conductive adhesives. Many new and old UBMs have been developed for a wide variety of materials and processes.
Assuming that the proper UBM has been applied, let’s look at some of the bump choices.
After IBM had mastered the assembly process, they sought a mass bumping method for simplicity and costs-savings. The first IBM bumps used discrete spheres, as described above for the IBM SLT. IBM next progressed to their solder-bump C4 process. Now a wide range of bumping processes are available from many sources:
Discrete Bumps: We can start with preformed spheres just like BGAs. Recall that the first FC used tiny copper balls that were soldered to the UBM-coated pads of the SLT package. This method is still viable but not too common. Both non-fusible copper balls and fusible solder alloys could be used.
Vacuum Deposition: IBM originally used vacuum deposition and this method is still in use, but declining. Equipment is expensive and maintenance is high. However, a variety of alloys can be produced by sequential deposition of two or more metals.
Plating: Electroplating has been known for decades in both the PWB and IC industry. IBM set up electrolytic bump plating several years ago to replace vacuum deposition. While electro-bumping is not the lowest cost process, it allows extremely good control and will likely be the preferred method for high I/O fine pitch.
Electroless Nickel: This very old process in the automotive and other industries was applied to FC about a decade ago. While Delco and others have developed processes, Technical University of Berlin (TUB) and IZM/Fraunhofer have done much work and published most extensively. Pac Tech and others offer services and technology for those who want to do their own bumping. The resulting nickel bump is generally low, since no mask is used to limit plating width, which increases with bump height. Also, the nickel cannot be directly bonded to, and a joining material must be added. Several companies, including Pac Tech and Motorola, have widely reported on forming solder bumps over the nickel. The nickel with solder paste bumping process appears to be one of the more popular for low to medium density.
Conductive Adhesives: Epoxy Technology (Epotek) invented and developed patented methods for forming conductive adhesive bumps during the 1990′s. They license this technology, and their spin-off, Polymer Flip Chip (PFC) provides bumping services. Conductive adhesive paste is used to join the bump to substrate. The bumping and assembly processes are low temperature and there are no a-particle emitters.
Stud Bumps: Mechanical stud bumping commonly uses a gold ball bonder to form a connection to the pad and then break the wire, leaving a bump, or “stud.” The process goes back at least to the late 1980′s and was used by IBM for prototyping. Several Japanese companies have improved the process with automated equipment that can form 10 or more gold stud bumps per second. While cost inevitably increases per die as I/O count goes up, this is a practical cost-effective bumping method for low I/O die, like memory. It is also ideal for bumping single chips, preferred to wafers by many companies.
The history of FC may be dated from the invention of IBM’s SLT in 1961. The technology has evolved on many fronts, especially bumping and underfill. While FC is not suited for every application, the technology will continue to grow, especially for high lead count ICs.
Angelo Gulino, Alpha-Fry Technologies, personal communication, Jan. 8, 2001.
 Totta, P., IBM, personal communication, Jan. 8, 2001.
 Totta, P.; Sopher, R., “SLT Device Metallurgy and Its Monolithic Extensions”, IBM J. Res. Development, 5: pp. 226 – 238, May 1969.
FOR ADDITIONAL INFORMATION
Baldwin, D. and Pascarella, N., “Manufacturability of Underfill Processing for Low Cost Flip Chip”, ASME International Congress and Expo., Dallas, TX, November 1997.
Diep-Quang, H., “Epoxy Based, VOC-Free Soldering Flux”, US Patent 5,904,782, May 18, 1999.
Gilleo, K. and Blumel, D., “New Generation Underfills Power the 2nd Flip Chip Revolution”, pp. 147 – 154, Proc. Pan Pacific Microelectronics Symposium, Mauna Lani, HI, Feb. 10 – 13, 1998.
Gilleo, K. and Blumel, D., “The Great Underfill Race”, pp. 701 – 706, Proc. International Symposium on Microelectronics, IMAPS, San Diego, CA, Nov. 1 – 4, 1998.
Gilleo, K., “Chip Scale or Flip Scale: The Wrong Question?”, pp. 30, 31 – 34, Circuits Assembly, Feb. 1998.
Gilleo, K., “Direct Chip Interconnect Using Polymer Bonding”, Electronic Connection Conference, (IEEE Proc. CHMT 3-39 8933552), Houston, TX, May 1989.
Gilleo, K., “Flip or Flop?”, pp. 40 – 42, 44 – 48, Circuits Assembly, Feb. 1997.
Gilleo, K., and Blumel, D., “Transforming Flip Chip into CSP with Reworkable Wafer-Level Underfill”, pp. 159 – 165, Proc. Fourth Annual Pan Pacific Microelectronics Symposium, Kaua’l, HI, Feb. 2 – 5, 1999.
Gilleo, K., Cinque, T. and Silva, A., “Flip Chip 1, 2, 3: Bump, Bond and Fill”, pp. 32 – 34, Circuits Assembly, June 1996.
Han, S., Wang, K., and Cho, S., “Experimental and Analytical Study on the Flow of Encapsulant During Underfill Encapsulation of Flip-Chips”, Proc. 46th Electronic Components and Technology Conference, Orlando, FL, May 1996, pp. 327-334.
Ito, S., et al, “A Novel Flip Chip Technology Using Non-Conductive Resin Sheet”, 48th ECTC, Seattle, WA, May 1998, pp. 1047-1051.
Johnson, C. D. and Baldwin, D. F., “Pre-Applied Underfills for Low Cost Flip Chip Processing”, pp. 73 – 76, International Symposium on Advanced Packaging Materials, Chateau Elan, GA, March 14 – 17, 1999.
Lasky, R., Morvan, Y. and Gilleo, K., “Advances in Materials and Processing in Flip Chip Processing”, Proceedings of InterPACK ’99, EEP-Vol. 26-2, pp. 1527 – 1526, Maui, HI, June 13 – 19, 1999.
Pascarella, N. and Baldwin, D., “Advanced Encapsulation Processing for Low Cost Electronics Assembly – A Cost Analysis”, Advances in Electronic Packaging – ASME INTERpack ’97, Vol. 19-1, June 1997, pp. 359-363.
Pascarella, N. and Baldwin, D., “Compression Flow Modeling of Underfill Encapsulants for Low Cost Flip Chip Assembly”, 48th ECTC, Seattle, WA, May 1998, pp. 463-470.
Preveti, M., “No Flow Underfill Reliability is Here – Finally!”, pp. P-MT1/1-1 – 1-4, Technical Proc. APEX, Long Beach, CA, Mar 12-16, 2000.