George A. Riley
High frequency power transistors would perform better with flip chip mounting, because replacing wire bonds with bumps reduces the electrical inductance, improving gain at higher frequencies. However, flip chip assembly, even with gold bumps, is inadequate to carry away the heat from a device producing 100 watts in a few square millimeters. Consequently, these high power devices are conventionally mounted face up on a grounded metal package placed directly on a heat sink, so that the entire back side can be a cooling path. Connection is through wire bonds, at some penalty in performance,
In December, Fujitsu announced a solution to this problem, with the world’s first successful application of carbon nanotubes as heat sinks for semiconductor devices. The higher thermal conductivity of the nanotubes compared to gold allows high power devices to be mounted face down, with flip chip bumps replacing wire bonds.
Fujitsu’s test vehicle was an in-house gallium nitride high power transistor. Figure 1 schematically shows the transistor die mounted face up with wire bond connections, allowing backside heat dissipation to the substrate.
Figure 1. Face-up mounting with wire bonds. (Fujitsu Photo)
Figure 2 illustrates the steps in assembly. The package with carbon nanotube bumps is shown on the left. The die is flipped to face down, aligned with the nanotube bumps and attached to the package.
Figure 2. Assembly of die and package. (Fujitsu Photo)
Figure 3 shows SEM photos of the nanotube bumps at three magnifications: first on the substrate metal; then an enlarged view of one portion of a bump; then a further enlargement of that portion, showing the vertical nanotubes.
Figure 3. SEM photos of the nanotube bumps. (Fujitsu Photo)
The multi-wall nanotubes are grown on the aluminum nitride substrate using hot-filament chemical vapor deposition (HF-CVD) of acetylene and argon gases at 650 ºC. An aluminum-iron catalyst is first patterned on the substrate, to define the bumps and control their growth.
The nanotubes have minimum height of 15 micrometers, consistent with flip chip bump heights. Bump widths are limited to 10 micrometers, to match the chip pad widths. Nanotube density is estimated at 1011 cm-2. The completed substrate nanotubes are plated with about one micrometer of gold, and a standard GaN high power amplifier chip is attached by thermo-compression bonding.
The electrical and thermal operating performance of the test device was compared with that of an identical die, wire-bonded with backside cooling. Eliminating the bond wires reduces inductance to ground more than 50%, increasing gain compared the face-up wire bonded device by more than 2 decibels at frequencies above 5 gigahertz. The resulting temperature increase is equivalent to face-up devices with backside mounting.
In 2002, Fujitsu was the first to demonstrate control of multi-wall nanotube length and diameter, using catalysts suitable for semiconductor interconnection. Fujitsu’s ongoing development now will include increasing the site density of the carbon nanotubes to further improve heat transfer. Their goal is high frequency, high power flip chip amplifiers for mobile communication base stations. Fujitsu expects first product introduction of these devices in about three years.
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